A multilayer wiring structure may be used as a wiring structure of an electronic component. The multilayer wiring structure includes, for example, a first wiring layer, a diffusion barrier film and a second wiring layer. The first wiring layer includes an insulating film and a copper wiring, and the copper wiring is formed within a trench which is formed in the insulating film. The diffusion barrier film is provided on the first wiring layer. The second wiring layer is provided on the diffusion barrier film. The second wiring layer includes an insulating film and a copper wiring. The copper wiring of the second wiring layer is formed within a trench and a via hole which are formed in the insulating film of the second wiring layer. The copper wiring of the second wiring layer is connected to the copper wiring of the first wiring layer through an opening formed in the diffusion barrier film.
A damascene method is used to manufacture this multilayer wiring structure. By way of example, in a dual damascene method, a diffusion barrier film and an insulating film are formed on a first wiring layer of a target object. Then, a resist mask provided with an opening is formed on the insulating film, and a trench and a via hole is then formed in the insulating film by plasma etching. Subsequently, an opening is formed in the diffusion barrier film by plasma etching. This opening is connected to the via hole and extended down to a surface of a copper wiring of the first wiring layer. After the opening is formed in the diffusion barrier film, the target object is transferred into an atmospheric environment. Thereafter, a wet cleaning process is performed on the target object, and copper is filled in the trench, the via hole and the opening of the diffusion barrier film.
In the plasma etching of the diffusion barrier film by using the damascene method, a processing gas containing fluorine is generally used. In the plasma etching with this processing gas, if the opening is formed in the diffusion barrier film and the copper wiring of the first wiring layer is exposed, the surface of the copper wiring is exposed to active species of the fluorine. As a result, copper fluoride is formed on the surface of the copper wiring of the first wiring layer. If the copper fluoride comes into contact with moisture under the atmospheric environment, a hydrate is generated. Accordingly, surface roughness of the copper wiring is generated.
As a technique to deal with the surface roughness of the copper wiring, a technique of reducing the copper fluoride by performing a plasma process with a nitrogen gas and a hydrogen gas before the target object is transferred into the atmospheric environment and after the plasma etching of the diffusion barrier film is conducted is described in Patent Document 1.
Patent Document 1: Japanese Patent Laid-open Publication No. 2006-156486
In this technique, it is required to use a metal mask made of, for example, Ti or TiN instead of the resist mask which is typically used in the manufacture of the multilayer wiring structure. If, however, the plasma process with the nitrogen gas and the hydrogen gas is performed after the plasma etching of the diffusion barrier film is conducted and, then, if the target object is transferred into the atmospheric environment, the metal mask becomes to have surface roughness. This surface roughness of the metal mask is also deemed to be caused by a contact between the target object and moisture in the atmospheric environment. In this regard, it is required to suppress both the surface roughness of the copper wiring and the surface roughness of the metal mask.